These symbols are derived from the ones used in the W5100 Datasheet V1.2.4. I've replaced the symbol prefixes used by Wiznet with prefixes that start with "WIZ". That way you can distinguish the Wiznet symbols from other symbols that your own program might use.
Symbols that start "WIZ_" are mostly names for reserved addresses in W5100 memory.
Symbols that start "WIZS_" name the addresses that are specific to each W5100 socket;
these all take a socket number as argument, so for instance, the address of the Socket Mode register for socket #1 is referred to as "WIZS_MR(1)".
Symbols that refer to bit numbers within a register have names that start "WIZB_" or "WIZSB_".
Symbols that refer to special values in registers have names that start "WIZV_" or "WIZSV_".
"WIZSB_" and "WIZSV_" symbols are the same for all sockets, so they are not used with a socket argument.
/* Symbol definitions for the Wiznet W5100
Copyright (c) 2012, Mel Wilson mwilson@melwilsonsoftware.ca
License: Creative Commons Attribution 3.0 Unported License
http://creativecommons.org/licenses/by-sa/3.0/
*/
#ifndef WIZ5100_H
#define WIZ5100_H
#define WIZ_WRITE_COMMAND 0xF0
#define WIZ_READ_COMMAND 0x0F
// Register addresses and defined bits and values ..
#define WIZ_MR 0x00 // Mode register
#define WIZB_MR_RST 7
#define WIZB_MR_PB 4
#define WIZB_MR_PPOE 3
#define WIZB_MR_AI 1
#define WIZB_MR_IND 0
#define WIZ_GAR0 0x01 // Gateway Address
#define WIZ_GAR1 0x02
#define WIZ_GAR2 0x03
#define WIZ_GAR3 0x04
#define WIZ_SUBR0 0x05 // Subnet Mask
#define WIZ_SUBR1 0x06
#define WIZ_SUBR2 0x07
#define WIZ_SUBR3 0x08
#define WIZ_SHAR0 0x09 // Source Hardware Address (MAC)
#define WIZ_SHAR1 0x0A
#define WIZ_SHAR2 0x0B
#define WIZ_SHAR3 0x0C
#define WIZ_SHAR4 0x0D
#define WIZ_SHAR5 0x0E
#define WIZ_SIPR0 0x0F // Source IP Address
#define WIZ_SIPR1 0x10
#define WIZ_SIPR2 0x11
#define WIZ_SIPR3 0x12
#define WIZ_IR 0x15 // Interrupt
#define WIZB_IR_CONFLICT 7
#define WIZB_IR_UNREACH 6
#define WIZB_IR_PPPOE 5
#define WIZB_IR_S3_INT 3
#define WIZB_IR_S2_INT 2
#define WIZB_IR_S1_INT 1
#define WIZB_IR_S0_INT 0
#define WIZ_IMR 0x16 // Interrupt Mask
#define WIZB_IMR_IR7 7
#define WIZB_IMR_IR6 6
#define WIZB_IMR_IR5 5
#define WIZB_IMR_IR3 3
#define WIZB_IMR_IR2 2
#define WIZB_IMR_IR1 1
#define WIZB_IMR_IR0 0
#define WIZ_RTR0 0x17 // Retry Time
#define WIZ_RTR1 0x18
#define WIZ_RCR 0x19 // Retry Count
#define WIZ_RMSR 0x1A // RX Memory Size
#define WIZ_TMSR 0x1B // TX Memory Size
#define WIZ_PATR0 0x1C // Authentication Type in PPPoE
#define WIZ_PATR1 0x1D
#define WIZ_PTIMER 0x28 // PPP LCP Request Timer
#define WIZ_PMAGIC 0x29 // PPP LCP Magic Number
#define WIZ_UIPR0 0x2A // Unreachable IP Address
#define WIZ_UIPR1 0x2B
#define WIZ_UIPR2 0x2C
#define WIZ_UIPR3 0x2D
#define WIZ_UPORT0 0x2E // Unreachable Port
#define WIZ_UPORT1 0x2F
#define WIZ_SOCKET_BASE0 0x400 // Base for socket 0 registers
#define WIZ_SOCKET_BASE1 0x500 // Base for socket 1 registers
#define WIZ_SOCKET_BASE2 0x600 // Base for socket 2 registers
#define WIZ_SOCKET_BASE3 0x700 // Base for socket 3 registers
#define WIZ_SOCK_BASE(socket) (0x100*(socket) + 0x400)
#define WIZS_MR(socket) (0x00 + WIZ_SOCK_BASE(socket)) // Socket Mode
#define WIZSB_MR_MULTI 7
#define WIZSB_MR_MF 6
#define WIZSB_MR_NDMC 5
#define WIZSB_MR_P3 3
#define WIZSB_MR_P2 2
#define WIZSB_MR_P1 1
#define WIZSB_MR_P0 0
#define WIZSV_MR_CLOSED 0
#define WIZSV_MR_TCP 1
#define WIZSV_MR_UDP 2
#define WIZSV_MR_IPRAW 3
#define WIZSV_MR_MACRAW 4
#define WIZSV_MR_PPPOE 5
#define WIZS_CR(socket) (0x01 + WIZ_SOCK_BASE(socket)) // Socket Command
#define WIZSV_CR_OPEN 1
#define WIZSV_CR_LISTEN 2
#define WIZSV_CR_CONNECT 4
#define WIZSV_CR_DISCON 8
#define WIZSV_CR_CLOSE 0x10
#define WIZSV_CR_SEND 0x20
#define WIZSV_CR_SEND_MAC 0x21
#define WIZSV_CR_SEND_KEEP 0x22
#define WIZSV_CR_RECV 0x40
#define WIZS_IR(socket) (0x02 + WIZ_SOCK_BASE(socket)) // Socket Interrupt
#define WIZSB_IR_SEND_OK 4
#define WIZSB_IR_TIMEOUT 3
#define WIZSB_IR_RECV 2
#define WIZSB_IR_DISCON 1
#define WIZSB_IR_CON 0
#define WIZS_SR(socket) (0x03 + WIZ_SOCK_BASE(socket)) // Socket Status
#define WIZSV_SR_SOCK_CLOSED 0
#define WIZSV_SR_SOCK_INIT 0x13
#define WIZSV_SR_SOCK_LISTEN 0x14
#define WIZSV_SR_SOCK_ESTABLISHED 0x17
#define WIZSV_SR_SOCK_CLOSE_WAIT 0x1C
#define WIZSV_SR_SOCK_UDP 0x22
#define WIZSV_SR_SOCK_IPRAW 0x32
#define WIZSV_SR_SOCK_MACRAW 0x42
#define WIZSV_SR_SOCK_PPPOE 0x5F
#define WIZSV_SR_SOCK_SYNSENT 0x15
#define WIZSV_SR_SOCK_SYNRECV 0x16
#define WIZSV_SR_SOCK_FIN_WAIT 0x18
#define WIZSV_SR_SOCK_CLOSING 0x1A
#define WIZSV_SR_SOCK_TIME_WAIT 0x1B
#define WIZSV_SR_SOCK_LAST_ACK 0x1D
#define WIZSV_SR_SOCK_ARP 1
#define WIZS_PORT0(socket) (0x04 + WIZ_SOCK_BASE(socket)) // Socket Source Port
#define WIZS_PORT1(socket) (0x05 + WIZ_SOCK_BASE(socket))
#define WIZS_DHAR0(socket) (0x06 + WIZ_SOCK_BASE(socket)) // Socket Destination Hardware Address
#define WIZS_DHAR1(socket) (0x07 + WIZ_SOCK_BASE(socket))
#define WIZS_DHAR2(socket) (0x08 + WIZ_SOCK_BASE(socket))
#define WIZS_DHAR3(socket) (0x09 + WIZ_SOCK_BASE(socket))
#define WIZS_DHAR4(socket) (0x0A + WIZ_SOCK_BASE(socket))
#define WIZS_DHAR5(socket) (0x0B + WIZ_SOCK_BASE(socket))
#define WIZS_DIPR0(socket) (0x0C + WIZ_SOCK_BASE(socket)) // Socket Destination IP Address
#define WIZS_DIPR1(socket) (0x0D + WIZ_SOCK_BASE(socket))
#define WIZS_DIPR2(socket) (0x0E + WIZ_SOCK_BASE(socket))
#define WIZS_DIPR3(socket) (0x0F + WIZ_SOCK_BASE(socket))
#define WIZS_DPORT0(socket) (0x10 + WIZ_SOCK_BASE(socket)) // Socket Destination Port
#define WIZS_DPORT1(socket) (0x11 + WIZ_SOCK_BASE(socket))
#define WIZS_MSSR0(socket) (0x12 + WIZ_SOCK_BASE(socket)) // Socket Maximum Segment size
#define WIZS_MSSR1(socket) (0x13 + WIZ_SOCK_BASE(socket))
#define WIZS_PROTO(socket) (0x14 + WIZ_SOCK_BASE(socket)) // Socket Protocol in IP Raw Mode
#define WIZS_TOS(socket) (0x15 + WIZ_SOCK_BASE(socket)) // Socket IP TOS
#define WIZS_TTL(socket) (0x16 + WIZ_SOCK_BASE(socket)) // Socket IP TTL
#define WIZS_TX_FSR0(socket) (0x20 + WIZ_SOCK_BASE(socket)) // Socket TX Free Size
#define WIZS_TX_FSR1(socket) (0x21 + WIZ_SOCK_BASE(socket))
#define WIZS_TX_RD0(socket) (0x22 + WIZ_SOCK_BASE(socket)) // Socket TX Read Pointer
#define WIZS_TX_RD1(socket) (0x23 + WIZ_SOCK_BASE(socket))
#define WIZS_TX_WR0(socket) (0x24 + WIZ_SOCK_BASE(socket)) // Socket TX Write Pointer
#define WIZS_TX_WR1(socket) (0x25 + WIZ_SOCK_BASE(socket))
#define WIZS_RX_RSR0(socket) (0x26 + WIZ_SOCK_BASE(socket)) // Socket RX Received Size
#define WIZS_RX_RSR1(socket) (0x27 + WIZ_SOCK_BASE(socket))
#define WIZS_RX_RD0(socket) (0x28 + WIZ_SOCK_BASE(socket)) // Socket RX Read Pointer
#define WIZS_RX_RD1(socket) (0x29 + WIZ_SOCK_BASE(socket))
#define WIZ_RX_BUFFER_BASE 0x6000 // Base address of RX buffer pool
#define WIZ_TX_BUFFER_BASE 0x4000 // Base address of TX buffer pool
#endif // WIZ5100_H