This program shows how to communicate with the W5100 chip from Wiznet. This chip can be accessed by any microcontroller with the ability to do SPI communication, and gives the controller the ability to act as a host on the Internet or any other network that uses Internet Protocol. The code in this program was written as an Arduino sketch, but can be altered to use on most microcontrollers that have a C compiler available.
The changes needed to migrate from Arduino will include:
<stddint.h>
, and change some of the types.
Replace the Arduino type byte
by uint8_t
and
replace the Arduino type word
by uint16_t
.
wiz_select
, wiz_unselect
, wiz_read
, wiz_write
.
setup
function that sets up the pins that connect to the W5100.
The replacement code will do the necessary setup for SPI on your microcontroller.
WISZ_
(0)
symbols will have to be adjusted to match,
and you will have to write appropriate definitions for SOCKx_RX_BASE, SOCKx_TX_BASE, SOCKx_RX_MASK, and SOCKx_TX_MASK.
I've written suggested definitions at the end of this article.
int main ()
{
setup();
for (;;)
loop();
}
You can take this into account if you adapt the wiztalk code.
Click to see the source file wiztalk.pde from the demo program.
The W5100 contains two 8K-byte buffer blocks: one for received data, and one for transmitted data.
You can allocate this space to the four sockets in 1K, 2K, 4K, or 8K blocks by setting the WIZ_RMSR register for receive-buffer allocations,
and WIZ_TMSR for transmit buffer allocations.
If you use the code example below, setting the
_RX_SIZE and
_TX_SIZE symbols to match your allocation,
then the
_BASE and
_MASK definitions can be used unchanged to set up the values used by the wiztalk program.
// Define Receive and Transmit buffer sizes and addresses for the sockets we will use ..
#define SOCK0_RX_SIZE 2048
#define SOCK0_TX_SIZE 2048
#define SOCK1_RX_SIZE 2048
#define SOCK1_TX_SIZE 2048
#define SOCK2_RX_SIZE 2048
#define SOCK2_TX_SIZE 2048
#define SOCK3_RX_SIZE 2048
#define SOCK3_TX_SIZE 2048
#define SOCK0_RX_BASE WIZ_RX_BUFFER_BASE
#define SOCK0_RX_MASK (SOCK0_RX_SIZE - 1)
#define SOCK0_TX_BASE WIZ_TX_BUFFER_BASE
#define SOCK0_TX_MASK (SOCK0_TX_SIZE - 1)
#define SOCK1_RX_BASE (SOCK0_RX_BASE+SOCK0_RX_SIZE)
#define SOCK1_RX_MASK (SOCK1_RX_SIZE - 1)
#define SOCK1_TX_BASE (SOCK0_TX_BASE+SOCK0_TX_SIZE)
#define SOCK1_TX_MASK (SOCK1_TX_SIZE - 1)
#define SOCK2_RX_BASE (SOCK1_RX_BASE+SOCK1_RX_SIZE)
#define SOCK2_RX_MASK (SOCK2_RX_SIZE - 1)
#define SOCK2_TX_BASE (SOCK1_TX_BASE+SOCK1_TX_SIZE)
#define SOCK2_TX_MASK (SOCK2_TX_SIZE - 1)
#define SOCK3_RX_BASE (SOCK2_RX_BASE+SOCK2_RX_SIZE)
#define SOCK3_RX_MASK (SOCK3_RX_SIZE - 1)
#define SOCK3_TX_BASE (SOCK2_TX_BASE+SOCK2_TX_SIZE)
#define SOCK3_TX_MASK (SOCK3_TX_SIZE - 1)